1. Field of the Invention
This invention relates to a current mirror circuit that copies a current in proportion to an input current and a digital-to-analog conversion circuit using the current mirror circuit.
2. Description of the Related Art
A general current mirror circuit has a configuration in which the gates of a pair of MOS transistors are connected together and the drain and gate of one of the MOS transistors are connected together. In the above current mirror circuit, large current mismatching occurs between the input and output currents due to influences of a variation in elements and particularly a variation in the threshold voltages of the MOS transistors. As a current mirror circuit that reduces the influence of a variation in the elements without enlarging the element area, conventionally, a degenerating resistor current mirror circuit having source resistors connected to the sources of a pair of MOS transistors is known. In the improved current mirror circuit, it is necessary to use the source resistor with large resistance in order to attain a highly effective effect of reducing the degree of current mismatching. As a result, conventionally, a voltage drop in the source resistor of the MOS transistor becomes larger and so it becomes difficult to perform the low-voltage operation.
In U.S. Pat. No. 6,191,637, entitled “SWITCHED CAPACITOR BIAS CIRCUIT FOR GENERATING A REFERENCE SIGNAL PROPORTIONAL TO ABSOLUTE TEMPERATURE, CAPACITANCE AND CLOCK FREQUENCY” by Lewicki et al., the technique of realizing a highly precise current source that is controlled by a clock frequency and reference voltage and in which a switched capacitor is connected to a source side of one of a pair of MOS transistors configuring a current mirror pair is disclosed.